1. Field of the Invention
This invention relates to a variable-capacitance diode element, and more particularly it pertains to such a diode element which is improved in respect of variation tendency of the capacitance-voltage characteristic thereof and has the high-frequency serial resistance R.sub.s reduced so as to represent an enhanced quality factor Q.
2. Description of the Prior Art
Generally, most variable-capacitance diode elements are fabricated in the form of planar construction. Description will now be made of a conventional variable-capacitance diode element with reference to a fabricating process as illustrated in FIGS. 1 to 3.
In FIG. 2, an N-type semiconductor substrate 1 having a lower resistivity is prepared which is provided, by means of a vapor-phase growth process, with an N-type epitaxial layer 2 having a higher resistivity than that of the semiconductor substrate 1, say about 1 .OMEGA.cm and a thickness of about 4-5 .mu.m (FIG. 2(a)). A major surface of the epitaxial layer 2 is subjected to a thermal oxidization treatment so that a thermally oxidized film (SiO.sub.2) 3 is formed in a thickness of about 1 .mu.m, and then an opening portion 6 is formed in the film 3 by means of an etching process. Subsequently, by means of an ion implantation process and under such conditions as acceleration voltage of 130 KeV and dosage of (2 to 3).times.10.sup.13 cm.sup.-2, an N-type impurity element is implanted into the the epitaxial layer 2 through the opening portion 6 through which the major surface of the epitaxial layer 2 is exposed, thereby forming an N-type diffusion layer. It is also possible that the ion implantation may be effected in such a manner that the impurity element is implanted through an oxide film of 100-3000 .ANG.. Thereafter, the resultant composite structure is subjected to a heat treatment which also serves to effect annealing for recovery of latice defects resulting from the ion implantation and carrier recovery, thus resulting in an N.sup.+ -type diffusion layer 4 being formed which has a higher impurity concentration than that of the aforementioned epitaxial layer (FIG. 2(b)). Subsequently, a P.sup.++ -type diffusion layer 5 is formed which has a smaller diffusion length than that of the diffusion layer 4 and covers the exposed portion of the diffusion layer 4 in such a manner that a PN junction is defined between the diffusion layer 5 and the diffusion layer 4 and epitaxial layer 2 (FIG. 2(c)). Electrodes are then provided at the top and bottom of the resulting composite structure respectively, and in this way, a variable-capacitance diode element is provided.
With the conventional variable-capacitance diode element, assuming that the impurity concentration of the P-type diffusion layer 5 is sufficiently higher than that of the N.sup.+ -type diffusion layer 4 and epitaxial layer 2, the width of depletion layer in the P-type diffusion layer 5, when a reverse bias voltage V.sub.R is applied, becomes very small, i.e., negligible as compared with the width of depletion layer extending in the N.sup.+ -type diffusion layer 4 and epitaxial layer 2. To explain with reference to FIG. 1, the variable capacitance C.sub.j of the variable-capacitance diode element is considered to consist of a combination of a junction capacitance C.sub.j1 due to a depletion layer 9 occurring due to the PN junction between the N-type diffusion layer 4 and the P-type diffusion layer 5 and a junction capacitance C.sub.j2 due to a depletion layer 10 resulting from the PN junction between the epitaxial layer 2 and the P-type diffusion layer 5. The impurity concentration of the epitaxial layer 2 is lower than that of the N-type diffusion layer 4 so that the width of the depletion layer 8 of the epitaxial layer becomes greater than that of the depletion layer 7 of the diffusion layer 4.
As well known in the art, by varying the applied voltage V.sub.R, the width of the depletion layer 7, 8 is increased or decreased so that the capacitance C.sub.j1, C.sub.j2 is varied, thus resulting in variation in the variable capacitance C.sub.j which consists of a combination of the capacitances C.sub.j1 and C.sub.j2 as mentioned above.
The variable capacitance of the variable-capacitance diode element is given by the following expressions: ##EQU1## where W.sub.j is the width of depletion layer; N (x) is the impurity concentration; K.sub.s is the dielectric constant of the semiconductor substrate; .epsilon..sub.o is the dielectric constant in a vacuum (8.85.times.10.sup.-12 F/m.sup.2); q is electron charge (1.60.times.10.sup.-19 C); .PHI..sub.B is the diffusion potential at the PN junction; n is a constant determined from the concentration gradient of the impurity element in the diode element; and A is the area of the diode element.
It will be seen from Equations (1) and (2) that the width of depletion layer depends on the impurity concentration of the semiconductor layer forming the PN junction with the P-type diffusion layer 5. If a reverse bias voltage V.sub.R is applied to the variable capacitance diode element, then the width W.sub.j2 of the depletion layer 8 in the epitaxial layer 2 the impurity concentration of which is lower than that of the diffusion layer, becomes greater than the width W.sub.j1 of the depletion layer extending in the diffusion layer 4; and as the applied voltage V.sub.R is increased, the depletion layer is caused to extend until it contacts the semiconductor substrate 1, and no further extension thereof is permitted. Thus, the so-called capacitance-voltage characteristic of the diode element represents saturation tendency.
To explain about such saturation, reference will be made to FIG. 3 showing the capacitance-voltage characteristics. With the conventional variable-capacitance diode element, as shown at (I) in FIG. 3, when the applied voltage V.sub.R exceeds about 15 volts (V.sub.1) the gradient of the characteristic curve becomes gentle; thus the curve represents saturation tendency with the applied voltage of V.sub.1, and the capacitance becomes saturated at C.sub.s. Obviously, such conventional variable-capacitance diode element is disadvantageous in that hte range of variation of the capacitance C.sub.j with the applied voltage is decreased due to the depletion layer extending from the periphery of the N.sup.+ type diffusion layer 4.
To eliminate the foregoing drawback, the thickness t of the epitaxial layer 2 is increased so that the depletion layer can be prevented from coming into contact with the semiconductor substrate 1 when the applied voltage becomes equal to V.sub.2. In contrast thereto, however, this is disadvantageous in that due to the fact that the thickness of the epitaxial layer 2 lying immediately below the diffusion layer 4 is increased, the high-frequency serial resistance R.sub.s is increased so that the quality factor Q is decreased. For this reason, it is not allowed to make the epitaxial layer 2 thicker than in the prior art.